The invention relates to color display systems which employ one or more electro-optic display devices. Such a display device serves as a light modulator, either in the reflective or transmissive mode, to control the grey level of projected light at each pixel point. More particularly, the invention relates to such a color display system having digital-to-analog (DAC) controlled ramp generator circuitry to convert incoming digital display signals to analog signals, and circuitry to address the individual pixels of the display device with such analog signals.
Color display systems are known in which light bars of different colors are sequentially scrolled across a single electro-optic light modulator panel to produce a color display. See, for example, commonly assigned U.S. Pat. No. 5,532,763, incorporated herein by reference.
These display systems are particularly suitable for displaying color information in the form of continuously updated image information signals arranged in successive frames, such as color video information, in which each frame is composed of component color sub-frames, e.g., red, green and blue sub-frames.
These systems employ an electro-optic light modulator panel comprised of a row-and-column matrix array of pixels, for modulating light in accordance with the image information signals during successive frame periods. The analog signal information is applied to the pixel columns of the array, a row at a time, during each frame period.
A system of this type is also disclosed in the publication of J. A. Shimizu, xe2x80x9cSingle Panel Reflective LCD Projectorxe2x80x9d, Projection Displays V, Proceedings SPIE, Vol. 3634, pp. 197-206 (1999). In such a system, a plurality of column pixel driver circuits receive a common ramp signal which is repeatedly generated, during a plurality of cycles, by the output buffer of a digital-to-analog converter (DAC) controlled ramp generator. Each column driver is coupled to all the pixels in a column of the electro-optic display device. During each ramp cycle, the column driver applies a prescribed voltage, corresponding to a desired pixel brightness level, to a pixel in a particular row in the respective column.
The pixels in a column are selected by a row control circuit which selects successive pixel rows during successive ramp cycles.
In a system of this type, the DAC controlled ramp generator becomes a performance xe2x80x9cbottleneckxe2x80x9d at higher frame rates (greater than 120 frames/second) which are desirable to reduce color artifacts and flicker. As the frame rate is increased, the finite conversion time (cycle time) of the DAC poses a limitation on the maximum speed of operation.
It is a principal object of the present invention to provide a circuit which will permit an increase in the frame rate in an electro-optic display without increasing the speed of the DAC, without increasing the cost of hardware, and without reducing the number of grey levels (brightness levels) which can be applied to each pixel.
This object, as well as other objects which will become apparent from the discussion that follows, are achieved, in accordance with the present invention, (1) by reducing the grey scale resolution, thus reducing the number of times that the DAC must convert a digital number to an analog voltage during each ramp cycle, and restoring the original resolution using xe2x80x9ctemporal ditheringxe2x80x9dxe2x80x94i.e., interpolation between the brightness levels of pixels in successive framesxe2x80x94and/or (2) by providing a multi-phase clock and multiplexer which enables a selection from among several analog levels during each clock cycle (DAC conversion).
The present invention thus affords an improvement in speed in a system for applying various levels of voltage to the individual pixels in an electro-optic display device having a matrix of pixels arranged vertically in columns and horizontally in rows. This system includes:
(a) a digital signal source for producing a plurality of digital signals which change monotonically in value in successive steps during a frame cycle, and repeats such changes during a plurality of successive cycles;
(b) a digital-to-analog converter (DAC), connected to the digital signal source, for producing a voltage signal having a value corresponding to that of the digital signal;
(c) a number of column drivers, one for each column of the display device, which includes a track and hold circuit, coupled to the pixels in the respective column of the display device, for storing the voltage signal when it reaches a prescribed value corresponding to a particular brightness level of a pixel in the respective column and in a particular row during a given cycle;
(d) a column control circuit, coupled to all of the column drivers, for causing respective ones of the track and hold circuits to sample and store the voltage signal when it reaches the prescribed value for each respective column; and
(f) a row control circuit for repeatedly selecting one or more pixel rows which receive the voltage signals stored in the track and hold circuits of the column drivers.
In a preferred embodiment of the invention, the column control circuit in this system includes:
(1) a number of column registers, one for each column of the display device, for storing a digital number corresponding to the desired brightness level of a pixel in the respective column;
(2) a control circuit coupled to the column registers for causing each column driver associated with a respective column to hold the voltage signal when it reaches a value corresponding to a digital number stored the column register associated with that column; and
(3) an input circuit, coupled to the plurality of column registers, for supplying digital numbers to the column registers. The input circuit causes the digital numbers to alternate during a plurality of frame cycles between a number representing a value above, and a number representing a value below the desired brightness level of a pixel in each respective column when the desired brightness level falls between such two values.
With this arrangement, the average brightness level of each pixel is caused to approximate the desired brightness level although the numbers stored in the column register for each pixel may not represent a value that is equal to the desired brightness level. The end result is what may be called xe2x80x9ctemporal ditheringxe2x80x9d; that is, the interpolation between the brightness levels of each pixel in successive frames.
Advantageously, the input circuit for the column registers may be constructed so as to separately supply digital numbers to the odd column registers and to the even column registers and to phase shift the control signals for the two sets of column registers. In this way, the visibility of the temporal artifacts can be reduced.
In addition to providing temporal dithering, the column control circuit may be constructed to provide xe2x80x9cspacial ditheringxe2x80x9d; that is, to alternate the brightness levels of two pixels in adjacent columns of the given row or two pixels in adjacent rows of a given column. As in the case with temporal dithering, the human eye can interpolate between these two adjacent pixels so that the brightness appears to be intermediate between the brightness of each pixel alone.
For a full understanding of the present invention, reference should now be made to the following detailed description of the preferred embodiments of the invention as illustrated in the accompanying drawings.